.. SPDX-License-Identifier: GPL-2.0 .. include:: ../../disclaimer-zh_CN.rst :Original: Documentation/arch/loongarch/irq-chip-model.rst :Translator: Huacai Chen <chenhuacai@loongson.cn> ================================== LoongArchçš„IRQ芯片模型(层级关系) ================================== ç›®å‰ï¼ŒåŸºäºŽLoongArch的处ç†å™¨ï¼ˆå¦‚龙芯3A5000)åªèƒ½ä¸ŽLS7A芯片组é…åˆå·¥ä½œã€‚LoongArch计算机 ä¸çš„ä¸æ–控制器(å³IRQ芯片)包括CPUINTC(CPU Core Interrupt Controller)ã€LIOINTC( Legacy I/O Interrupt Controller)ã€EIOINTC(Extended I/O Interrupt Controller)〠HTVECINTC(Hyper-Transport Vector Interrupt Controller)ã€PCH-PIC(LS7AèŠ¯ç‰‡ç»„çš„ä¸»ä¸ æ–控制器)ã€PCH-LPC(LS7A芯片组的LPCä¸æ–控制器)和PCH-MSI(MSIä¸æ–控制器)。 CPUINTC是一ç§CPU内部的æ¯ä¸ªæ ¸æœ¬åœ°çš„ä¸æ–控制器,LIOINTC/EIOINTC/HTVECINTC是CPU内部的 全局ä¸æ–控制器(æ¯ä¸ªèŠ¯ç‰‡ä¸€ä¸ªï¼Œæ‰€æœ‰æ ¸å…±äº«ï¼‰ï¼Œè€ŒPCH-PIC/PCH-LPC/PCH-MSI是CPUå¤–éƒ¨çš„ä¸ æ–控制器(在é…套芯片组里é¢ï¼‰ã€‚这些ä¸æ–控制器(或者说IRQ芯片)以一ç§å±‚æ¬¡æ ‘çš„ç»„ç»‡å½¢å¼ çº§è”在一起,一共有两ç§å±‚çº§å…³ç³»æ¨¡åž‹ï¼ˆä¼ ç»ŸIRQ模型和扩展IRQ模型)。 ä¼ ç»ŸIRQ模型 =========== 在这ç§æ¨¡åž‹é‡Œé¢ï¼ŒIPI(Inter-Processor Interrupt)和CPU本地时钟ä¸æ–直接å‘é€åˆ°CPUINTC, CPU串å£ï¼ˆUARTs)ä¸æ–å‘é€åˆ°LIOINTC,而其他所有设备的ä¸æ–则分别å‘é€åˆ°æ‰€è¿žæŽ¥çš„PCH-PIC/ PCH-LPC/PCH-MSI,然åŽè¢«HTVECINTC统一收集,å†å‘é€åˆ°LIOINTC,最åŽåˆ°è¾¾CPUINTC:: +-----+ +---------+ +-------+ | IPI | --> | CPUINTC | <-- | Timer | +-----+ +---------+ +-------+ ^ | +---------+ +-------+ | LIOINTC | <-- | UARTs | +---------+ +-------+ ^ | +-----------+ | HTVECINTC | +-----------+ ^ ^ | | +---------+ +---------+ | PCH-PIC | | PCH-MSI | +---------+ +---------+ ^ ^ ^ | | | +---------+ +---------+ +---------+ | PCH-LPC | | Devices | | Devices | +---------+ +---------+ +---------+ ^ | +---------+ | Devices | +---------+ 扩展IRQ模型 =========== 在这ç§æ¨¡åž‹é‡Œé¢ï¼ŒIPI(Inter-Processor Interrupt)和CPU本地时钟ä¸æ–直接å‘é€åˆ°CPUINTC, CPU串å£ï¼ˆUARTs)ä¸æ–å‘é€åˆ°LIOINTC,而其他所有设备的ä¸æ–则分别å‘é€åˆ°æ‰€è¿žæŽ¥çš„PCH-PIC/ PCH-LPC/PCH-MSI,然åŽè¢«EIOINTC统一收集,å†ç›´æŽ¥åˆ°è¾¾CPUINTC:: +-----+ +---------+ +-------+ | IPI | --> | CPUINTC | <-- | Timer | +-----+ +---------+ +-------+ ^ ^ | | +---------+ +---------+ +-------+ | EIOINTC | | LIOINTC | <-- | UARTs | +---------+ +---------+ +-------+ ^ ^ | | +---------+ +---------+ | PCH-PIC | | PCH-MSI | +---------+ +---------+ ^ ^ ^ | | | +---------+ +---------+ +---------+ | PCH-LPC | | Devices | | Devices | +---------+ +---------+ +---------+ ^ | +---------+ | Devices | +---------+ 虚拟扩展IRQ模型 =============== 在这ç§æ¨¡åž‹é‡Œé¢, IPI(Inter-Processor Interrupt) å’ŒCPU本地时钟ä¸æ–直接å‘é€åˆ°CPUINTC, CPUä¸²å£ (UARTs) ä¸æ–å‘é€åˆ°PCH-PIC, 而其他所有设备的ä¸æ–则分别å‘é€åˆ°æ‰€è¿žæŽ¥çš„PCH_PIC/ PCH-MSI, 然åŽV-EIOINTC统一收集,å†ç›´æŽ¥åˆ°è¾¾CPUINTC:: +-----+ +-------------------+ +-------+ | IPI |--> | CPUINTC(0-255vcpu)| <-- | Timer | +-----+ +-------------------+ +-------+ ^ | +-----------+ | V-EIOINTC | +-----------+ ^ ^ | | +---------+ +---------+ | PCH-PIC | | PCH-MSI | +---------+ +---------+ ^ ^ ^ | | | +--------+ +---------+ +---------+ | UARTs | | Devices | | Devices | +--------+ +---------+ +---------+ V-EIOINTC 是EIOINTC的扩展, 仅工作在虚拟机模å¼ä¸‹, ä¸æ–ç»EIOINTC最多å¯ä¸ªè·¯ç”±åˆ° 4个虚拟CPU. 但ä¸æ–ç»V-EIOINTC最多å¯ä¸ªè·¯ç”±åˆ°256个虚拟CPU. ä¼ ç»Ÿçš„EIOINTCä¸æ–控制器,ä¸æ–路由分为两个部分:8比特用于控制路由到哪个CPU, 4比特用于控制路由到特定CPU的哪个ä¸æ–管脚。控制CPU路由的8比特å‰4比特用于控制 路由到哪个EIOINTC节点,åŽ4比特用于控制æ¤èŠ‚点哪个CPU。ä¸æ–路由在选择CPU路由 å’ŒCPUä¸æ–管脚路由时,使用bitmapç¼–ç æ–¹å¼è€Œä¸æ˜¯æ£å¸¸ç¼–ç æ–¹å¼ï¼Œæ‰€ä»¥å¯¹äºŽä¸€ä¸ª EIOINTCä¸æ–控制器节点,ä¸æ–åªèƒ½è·¯ç”±åˆ°CPU0 - CPU3,ä¸æ–管脚IP0-IP3。 V-EIOINTC新增了两个寄å˜å™¨ï¼Œæ”¯æŒä¸æ–路由到更多CPU个和ä¸æ–管脚。 V-EIOINTC功能寄å˜å™¨ ------------------- 功能寄å˜å™¨æ˜¯åªè¯»å¯„å˜å™¨ï¼Œç”¨äºŽæ˜¾ç¤ºV-EIOINTC支æŒçš„特性,目å‰ä¸¤ä¸ªæ”¯æŒä¸¤ä¸ªç‰¹æ€§ EXTIOI_HAS_INT_ENCODE å’Œ EXTIOI_HAS_CPU_ENCODE。 特性EXTIOI_HAS_INT_ENCODEæ˜¯ä¼ ç»ŸEIOINTCä¸æ–控制器的一个特性,如果æ¤æ¯”特为1, 显示CPUä¸æ–管脚路由方å¼æ”¯æŒæ£å¸¸ç¼–ç ,而ä¸æ˜¯bitmapç¼–ç ,所以ä¸æ–å¯ä»¥è·¯ç”±åˆ° 管脚IP0 - IP15。 特性EXTIOI_HAS_CPU_ENCODE是V-EIOINTC新增特性,如果æ¤æ¯”特为1,表示CPU路由 æ–¹å¼æ”¯æŒæ£å¸¸ç¼–ç ,而ä¸æ˜¯bitmapç¼–ç ,所以ä¸æ–å¯ä»¥è·¯ç”±åˆ°CPU0 - CPU255。 V-EIOINTCé…置寄å˜å™¨ ------------------- é…置寄å˜å™¨æ˜¯å¯è¯»å†™å¯„å˜å™¨ï¼Œä¸ºäº†å…¼å®¹æ€§è€ƒè™‘,如果ä¸å†™æ¤å¯„å˜å™¨ï¼Œä¸æ–路由采用 å’Œä¼ ç»ŸEIOINTC相åŒçš„路由设置。如果对应比特设置为1,表示采用æ£å¸¸è·¯ç”±æ–¹å¼è€Œ ä¸æ˜¯bitmapç¼–ç 的路由方å¼ã€‚ 高级扩展IRQ模型 =============== 在这ç§æ¨¡åž‹é‡Œé¢ï¼ŒIPI(Inter-Processor Interrupt)和CPU本地时钟ä¸æ–直接å‘é€åˆ°CPUINTC, CPU串å£ï¼ˆUARTs)ä¸æ–å‘é€åˆ°LIOINTC,PCH-MSIä¸æ–å‘é€åˆ°AVECINTC,而åŽé€šè¿‡AVECINTC直接 é€è¾¾CPUINTC,而其他所有设备的ä¸æ–则分别å‘é€åˆ°æ‰€è¿žæŽ¥çš„PCH-PIC/PCH-LPC,然åŽç”±EIOINTC 统一收集,å†ç›´æŽ¥åˆ°è¾¾CPUINTC:: +-----+ +-----------------------+ +-------+ | IPI | --> | CPUINTC | <-- | Timer | +-----+ +-----------------------+ +-------+ ^ ^ ^ | | | +---------+ +----------+ +---------+ +-------+ | EIOINTC | | AVECINTC | | LIOINTC | <-- | UARTs | +---------+ +----------+ +---------+ +-------+ ^ ^ | | +---------+ +---------+ | PCH-PIC | | PCH-MSI | +---------+ +---------+ ^ ^ ^ | | | +---------+ +---------+ +---------+ | Devices | | PCH-LPC | | Devices | +---------+ +---------+ +---------+ ^ | +---------+ | Devices | +---------+ ACPI相关的定义 ============== CPUINTC:: ACPI_MADT_TYPE_CORE_PIC; struct acpi_madt_core_pic; enum acpi_madt_core_pic_version; LIOINTC:: ACPI_MADT_TYPE_LIO_PIC; struct acpi_madt_lio_pic; enum acpi_madt_lio_pic_version; EIOINTC:: ACPI_MADT_TYPE_EIO_PIC; struct acpi_madt_eio_pic; enum acpi_madt_eio_pic_version; HTVECINTC:: ACPI_MADT_TYPE_HT_PIC; struct acpi_madt_ht_pic; enum acpi_madt_ht_pic_version; PCH-PIC:: ACPI_MADT_TYPE_BIO_PIC; struct acpi_madt_bio_pic; enum acpi_madt_bio_pic_version; PCH-MSI:: ACPI_MADT_TYPE_MSI_PIC; struct acpi_madt_msi_pic; enum acpi_madt_msi_pic_version; PCH-LPC:: ACPI_MADT_TYPE_LPC_PIC; struct acpi_madt_lpc_pic; enum acpi_madt_lpc_pic_version; å‚考文献 ======== 龙芯3A5000的文档: https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-3A5000-usermanual-1.02-CN.pdf (ä¸æ–‡ç‰ˆ) https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-3A5000-usermanual-1.02-EN.pdf (英文版) 龙芯LS7A芯片组的文档: https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-CN.pdf (ä¸æ–‡ç‰ˆ) https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (英文版) .. note:: - CPUINTC:å³ã€Šé¾™èŠ¯æž¶æž„å‚考手册å·ä¸€ã€‹ç¬¬7.4节所æè¿°çš„CSR.ECFG/CSR.ESTAT寄å˜å™¨åŠå…¶ ä¸æ–控制逻辑; - LIOINTC:å³ã€Šé¾™èŠ¯3A5000处ç†å™¨ä½¿ç”¨æ‰‹å†Œã€‹ç¬¬11.1节所æè¿°çš„â€œä¼ ç»ŸI/Oä¸æ–â€ï¼› - EIOINTC:å³ã€Šé¾™èŠ¯3A5000处ç†å™¨ä½¿ç”¨æ‰‹å†Œã€‹ç¬¬11.2节所æ述的“扩展I/Oä¸æ–â€ï¼› - HTVECINTC:å³ã€Šé¾™èŠ¯3A5000处ç†å™¨ä½¿ç”¨æ‰‹å†Œã€‹ç¬¬14.3节所æ述的“HyperTransportä¸æ–â€ï¼› - PCH-PIC/PCH-MSI:å³ã€Šé¾™èŠ¯7A1000桥片用户手册》第5ç« æ‰€æ述的“ä¸æ–控制器â€ï¼› - PCH-LPC:å³ã€Šé¾™èŠ¯7A1000桥片用户手册》第24.3节所æ述的“LPCä¸æ–â€ã€‚